Services
ARCHITECTURE, DESIGN AND IMPLEMENTATION
Expertise in developing design architecture.
Creating designs which are compatible to ASIC and FPGAs and porting the designs to FPGA.
Track record of successful chip/system development from the specification
Strong knowledge of complete chip/SOC development methodology & flows.
Domain expertise in programmable processors for networking, video and audio applications
Domain expertise in networking protocols like ethernet, TCP/IP, WLAN etc
Proficient in memory controllers like DDR
Strong different on-chip and off chip serial/parallel bus protocols
Strong in synthesis, static timing analysis and timing closure
We work closely with physical design teams
FUNCTIONAL VERIFICATION AND VALIDATION
Combined expertise in both domain and verification methodologies like SV/UVM/DPI etc.
Verification team is having strong domain expertise like on-chip and off-chip bus protocols, connectivity protocols, processor based subsystems/chipsets like ARM/AMD etc.
Proficiency in Multimedia, Networking
Coherency verification – CCIX/CHI/ACE
Architected and developed different types of verification environments. Strong expertise in infrastructure development using Verilog, SystemVerilog, UVM and DirectC/DPI.
Gate Level Simulation-unit delay and SDF simulations
Having expertise in doing Assertion Based Verification, Metrics driven verification and coverage closure.
The company is expert in doing validation using FPGAs and industry standard emulators.
We are involved in more than 10 silicon bring ups.
DFT IMPLEMENTATION AND VERIFICATION
Strong knowledge on JTAG (1149.1/6, P1500 and IJTAG (1687) protocols
Strong knowledge and expertise in Memory BIST implementation and verification
Knowledge on Scan Insertion, coverage analysis and diagnosis
SOC DFX verification: Bscan, LBIST, MBIST, Loop Backs, Safety, Security and ScanDump
Familiar with Mentor tools for SCAN and MBIST
GLS (unit Delay and SDF simulations)
PHYSICAL DESIGN
Expertise on PD flow from netlist to GDS (floorplan, power planning, placement, optimization, CTS, routing, ECO steps, PV, Timing/SI)
Low power design experience
Strong knowledge in sign-off flow STA, DRC/LVS/Antenna/ERC, Power Analysis, IR/EM-Analysis, LEC, ECO (Timing and Functional)
Much familiar with OCV/MMMC, hierarchical designs and good working knowledge on Xtalk/SI/EMIR
Strong in CTS constraints, skew fixing, timing fixes and optimization techniques
Tool specific expertise on synopsys and cadence environments
Prior experience with 28 nm, 14 nm and lower technology nodes
Working expertise on block level and top level designs and contributed efforts in successful tape-outs in lower technologies and complex designs.
Strong in synthesis, static timing analysis and timing closure
We work closely with physical design teams
ABOUT COMPANY
HySoC Technologies founded in 2016, having headquarters in Hyderabad, India., led by passionate technology experts.
HySoC Technologies excels in providing turnkey product design and support complete spectrum of VLSI design services, thereby producing high performance, high quality.
CONTACT INFO
- Address # 101, Plot No.78-A, Designer Rocks Building, Ramky Towers Road, to, Mindspace Rd, Shilpa Layout, Gachibowli, Hyderabad, Telangana 500032
- careers@hysoctechnologies.com
- sales@hysoctechnologies.com