Physical Design


The design-cycle of VLSI-chips consists of different consecutive steps from high-level synthesis (functional design) to production. The physical design is the process of transforming a circuit description into the physical layout.

HySoC has in-depth expertise in following areas

PD flow from netlist to GDS (floorplan, power planning, placement, optimization, CTS, routing, ECO steps, PV, Timing/SI)

 Low power design

 Proficient in sign-off – STA, DRC/LVS/Antenna/ERC, Power Analysis, IR/EM-Analysis, LEC, ECO (Timing and Functional)

 OCV/MMMC, hierarchical designs and Xtalk/SI/EMIR

 CTS constraints, skew fixing, timing fixes and optimization techniques

 Tool specific expertise on synopsys and cadence environments

 Prior experience with 28 nm, 14 nm and lower technology nodes

 Expertise in block level and top level designs and contributed efforts in successful tape-outs in lower technologies and complex designs.

Synthesis, Timing analysis and closure


HySoC Technologies founded in 2016, having headquarters in Hyderabad, India., led by passionate technology experts.

HySoC Technologies excels in providing turnkey product design and support complete spectrum of VLSI design services, thereby producing high performance, high quality.